Casperfpga API reference

control and monitor fpga-based casper designs.

The FPGA Client

class casperfpga.CasperFpga(*args, **kwargs)[source]

A FPGA host board that has a CASPER design running on it. Or will soon have.

blindwrite(device_name, data, offset=0)[source]
check_rx_raw(wait_time=0.2, checks=10)[source]

Check to see whether this host is receiving packets without error on all its GBE interfaces. :param wait_time: seconds to wait between checks :param checks: times to run check :return:

check_tx_raw(wait_time=0.2, checks=10)[source]

Check to see whether this host is transmitting packets without error on all its GBE interfaces. :param wait_time: seconds to wait between checks :param checks: times to run check :return:

connect(timeout=None)[source]
deprogram()[source]

The child class will deprogram the FPGA, we just reset out device information :return:

device_names_by_container(container_name)[source]

Return a list of devices in a certain container.

devices_by_container(container)[source]

Get devices using container type.

disconnect()[source]
dram_bulkread(device, size, offset)[source]
Returns:
estimate_fpga_clock()[source]

Get the estimated clock of the running FPGA, in Mhz.

get_system_information(filename=None, fpg_info=None)[source]

Get information about the design running on the FPGA. If filename is given, get it from file, otherwise query the

host via KATCP.
Parameters:
  • filename – fpg filename
  • fpg_info – a tuple containing device_info and coreinfo dictionaries
Returns:

<nothing> the information is populated in the class

get_version_info()[source]
Returns:
is_connected()[source]

Is the transport connected to the host? :return:

is_running()[source]

Is the FPGA programmed and running? :return:

listdev()[source]

Get a list of the memory bus items in this design. :return: a list of memory devices

read(device_name, size, offset=0)[source]
read_dram(size, offset=0)[source]

Reads data from a ROACH’s DRAM. Reads are done up to 1MB at a time. The 64MB indirect address register is automatically incremented as necessary. It returns a string, as per the normal ‘read’ function. ROACH has a fixed device name for the DRAM (dram memory). Uses dram_bulkread internally. :param size: amount of data to read, in bytes :param offset: offset at which to read, in bytes :return: binary data string

read_int(device_name, word_offset=0)[source]

Read an integer from memory device. i.e. calls self.read(device_name, size=4, offset=0) and uses struct to unpack it into an integer :param device_name: device from which to read :param word_offset: the 32-bit word offset at which to read :return: signed 32-bit integer

read_uint(device_name, word_offset=0)[source]

Read an unsigned integer from memory device. :param device_name: device from which to read :param word_offset: the 32-bit word offset at which to read :return: unsigned 32-bit integer

set_igmp_version(version)[source]
Parameters:version
Returns:
test_connection()[source]

Write to and read from the scratchpad to test the connection to the FPGA

upload_to_ram_and_program(filename, port=-1, timeout=10, wait_complete=True)[source]

Upload an FPG file to RAM and then program the FPGA. :param filename: the file to upload :param port: the port to use on the rx end, -1 means a random port :param timeout: how long to wait, seconds :param wait_complete: wait for the transaction to complete, return after upload if False :return:

write(device_name, data, offset=0)[source]

Write data, then read it to confirm a successful write. :param device_name: memory device name to write :param data: packed binary data string to write :param offset: offset at which to write, in bytes :return:

write_dram(data, offset=0)[source]

Writes data to a ROACH’s DRAM. Writes are done up to 512KiB at a time. The 64MB indirect address register is automatically incremented as necessary. ROACH has a fixed device name for the DRAM (dram memory) and so the user does not need to specify the write register. :param data: packed binary string data to write :param offset: the offset at which to write :return:

write_int(device_name, integer, blindwrite=False, word_offset=0)[source]

Writes an integer to the device specified at the offset specified. A blind write is optional. :param device_name: device to be written :param integer: the integer to write :param blindwrite: True for blind write, default False :param word_offset: the offset at which to write, in 32-bit words :return:

The 10Gbe Module

class casperfpga.TenGbe(parent, name, address, length_bytes, device_info=None)[source]

To do with the CASPER ten GBE yellow block implemented on FPGAs, and interfaced-to via KATCP memory reads/writes.

dhcp_start()[source]

Configure this interface, then start a DHCP client on ALL interfaces.

fabric_disable()[source]

Enable the core fabric :return:

fabric_enable()[source]

Enable the core fabric :return:

fabric_soft_reset_toggle()[source]

Toggle the fabric soft reset :return:

classmethod from_device_info(parent, device_name, device_info, memorymap_dict)[source]

Process device info and the memory map to get all necessary info and return a TenGbe instance. :param parent: the parent device, normally an FPGA instance :param device_name: the unique device name :param device_info: information about this device :param memorymap_dict: a dictionary containing the device memory map :return: a TenGbe object

get_10gbe_core_details(read_arp=False, read_cpu=False)[source]

Get 10GbE core details. assemble struct for header stuff… 0x00 - 0x07: MAC address 0x08 - 0x0b: Not used 0x0c - 0x0f: Gateway addr 0x10 - 0x13: IP addr 0x14 - 0x17: Not assigned 0x18 - 0x1b: Buffer sizes 0x1c - 0x1f: Not assigned 0x20 : Soft reset (bit 0) 0x21 : Fabric enable (bit 0) 0x22 - 0x23: Fabric port 0x24 - 0x27: XAUI status (bit 2,3,4,5 = lane sync, bit6 = chan_bond) 0x28 - 0x2b: PHY config 0x28 : RX_eq_mix 0x29 : RX_eq_pol 0x2a : TX_preemph 0x2b : TX_diff_ctrl 0x30 - 0x33: Multicast IP RX base address 0x34 - 0x37: Multicast IP mask 0x38 - 0x3b: Multicast subnet mask 0x1000 : CPU TX buffer 0x2000 : CPU RX buffer 0x3000 : ARP tables start word_width = 8 self.add_field(Bitfield.Field(‘mac0’, 0, word_width, 0, 0 * word_width)) self.add_field(Bitfield.Field(‘mac1’, 0, word_width, 0, 1 * word_width)) self.add_field(Bitfield.Field(‘mac2’, 0, word_width, 0, 2 * word_width)) self.add_field(Bitfield.Field(‘mac3’, 0, word_width, 0, 3 * word_width)) self.add_field(Bitfield.Field(‘mac4’, 0, word_width, 0, 4 * word_width)) self.add_field(Bitfield.Field(‘mac5’, 0, word_width, 0, 5 * word_width)) self.add_field(Bitfield.Field(‘mac6’, 0, word_width, 0, 6 * word_width)) self.add_field(Bitfield.Field(‘mac7’, 0, word_width, 0, 7 * word_width)) self.add_field(Bitfield.Field(‘unused_1’, 0, (0x0c - 0x08) * word_width, 0, 8 * word_width)) self.add_field(Bitfield.Field(‘gateway_ip0’, 0, word_width, 0, 0x0c * word_width)) self.add_field(Bitfield.Field(‘gateway_ip1’, 0, word_width, 0, 0x0d * word_width)) self.add_field(Bitfield.Field(‘gateway_ip2’, 0, word_width, 0, 0x0e * word_width)) self.add_field(Bitfield.Field(‘gateway_ip3’, 0, word_width, 0, 0x0f * word_width)) self.add_field(Bitfield.Field(‘ip0’, 0, word_width, 0, 0x10 * word_width)) self.add_field(Bitfield.Field(‘ip1’, 0, word_width, 0, 0x11 * word_width)) self.add_field(Bitfield.Field(‘ip2’, 0, word_width, 0, 0x12 * word_width)) self.add_field(Bitfield.Field(‘ip3’, 0, word_width, 0, 0x13 * word_width)) self.add_field(Bitfield.Field(‘unused_2’, 0, (0x18 - 0x14) * word_width, 0, 0x14 * word_width)) self.add_field(Bitfield.Field(‘buf_sizes’, 0, (0x1c - 0x18) * word_width, 0, 0x18 * word_width)) self.add_field(Bitfield.Field(‘unused_3’, 0, (0x20 - 0x1c) * word_width, 0, 0x1c * word_width)) self.add_field(Bitfield.Field(‘soft_reset’, 2, 1, 0, 0x20 * word_width)) self.add_field(Bitfield.Field(‘fabric_enable’, 2, 1, 0, 0x21 * word_width)) self.add_field(Bitfield.Field(‘port’, 0, (0x24 - 0x22) * word_width, 0, 0x22 * word_width)) self.add_field(Bitfield.Field(‘xaui_status’, 0, (0x28 - 0x24) * word_width, 0, 0x24 * word_width)) self.add_field(Bitfield.Field(‘rx_eq_mix’, 0, word_width, 0, 0x28 * word_width)) self.add_field(Bitfield.Field(‘rq_eq_pol’, 0, word_width, 0, 0x29 * word_width)) self.add_field(Bitfield.Field(‘tx_preempth’, 0, word_width, 0, 0x2a * word_width)) self.add_field(Bitfield.Field(‘tx_diff_ctrl’, 0, word_width, 0, 0x2b * word_width)) #self.add_field(Bitfield.Field(‘buffer_tx’, 0, 0x1000 * word_width, 0, 0x1000 * word_width)) #self.add_field(Bitfield.Field(‘buffer_rx’, 0, 0x1000 * word_width, 0, 0x2000 * word_width)) #self.add_field(Bitfield.Field(‘arp_table’, 0, 0x1000 * word_width, 0, 0x3000 * word_width))

get_arp_details(port_dump=None)[source]

Get ARP details from this interface. :param port_dump: list - A list of raw bytes from interface memory.

get_cpu_details(port_dump=None)[source]

Read details of the CPU buffers. :param port_dump: :return:

multicast_receive(ip_str, group_size)[source]

Send a request to KATCP to have this tap instance send a multicast group join request. :param ip_str: A dotted decimal string representation of the base mcast IP address. :param group_size: An integer for how many mcast addresses from base to respond to.

multicast_remove(ip_str)[source]

Send a request to be removed from a multicast group. :param ip_str: A dotted decimal string representation of the base mcast IP address.

post_create_update(raw_device_info)[source]

Update the device with information not available at creation. :param raw_device_info: info about this block that may be useful

print_10gbe_core_details(arp=False, cpu=False, refresh=True)[source]

Prints 10GbE core details. :param arp: boolean, include the ARP table :param cpu: boolean, include the CPU packet buffers :param refresh: read the 10gbe details first

print_arp_details(refresh=False, only_hits=False)[source]

Print nicely formatted ARP info. :param refresh: :param only_hits: :return:

print_cpu_details(refresh=False)[source]

Print nicely formatted CPU details info. :param refresh: :return:

read_counters()[source]

Read all the counters embedded in this TenGBE yellow block

read_rx_counters()[source]

Read all RX counters embedded in this TenGBE yellow block

read_rxsnap()[source]

Read the RX snapshot embedded in this TenGBE yellow block :return:

read_tx_counters()[source]

Read all TX counters embedded in this TenGBE yellow block

read_txsnap()[source]

Read the TX snapshot embedded in this TenGBE yellow block :return:

rx_okay(wait_time=0.2, checks=10)[source]

Is this gbe core receiving okay? i.e. _rxctr incrementing and _rxerrctr not incrementing :param wait_time: seconds to wait between checks :param checks: times to run check :return: True/False

set_arp_table(macs)[source]

Set the ARP table with a list of MAC addresses. The list, macs, is passed such that the zeroth element is the MAC address of the device with IP XXX.XXX.XXX.0, and element N is the MAC address of the device with IP XXX.XXX.XXX.N

setup(mac, ipaddress, port)[source]

Set up the MAC, IP and port for this interface :param mac: :param ipaddress: :param port: :return:

tap_arp_reload()[source]

Have the tap driver reload its ARP table right now. :return:

tap_info()[source]

Get info on the tap instance running on this interface.

tap_running()[source]

Determine if an instance if tap is already running on for this ten GBE interface.

tap_start(restart=False)[source]

Program a 10GbE device and start the TAP driver. :param restart: stop before starting

tap_stop()[source]

Stop a TAP driver.

tx_okay(wait_time=0.2, checks=10)[source]

Is this gbe core transmitting okay? i.e. _txctr incrementing and _txerrctr not incrementing :param wait_time: seconds to wait between checks :param checks: times to run check :return: True/False

TapcpTransport Module

class casperfpga.TapcpTransport(**kwargs)[source]

The network transport for a tapcp-type interface.

blindwrite(device_name, data, offset=0, use_bulk=True)[source]

Unchecked data write. :param device_name: the memory device to which to write :param data: the byte string to write :param offset: the offset, in bytes, at which to write :param use_bulk: Does nothing. Kept for API compatibility :return: <nothing>

deprogram()[source]

Deprogram the FPGA. This actually reboots & boots from the Golden Image :return: nothing

get_firmware_version()[source]

Read the version of the firmware :return: golden_image, multiboot, firmware_major_version, firmware_minor_version

get_metadata()[source]

Read meta data from user_flash_loc on the fpga flash drive

get_soc_version()[source]

Read the version of the soc :return: golden_image, multiboot, soc_major_version, soc_minor_version

get_temp()[source]
is_connected()[source]
is_running()[source]

This is currently an alias for ‘is_connected’

listdev()[source]
listdev_pl()[source]
prog_user_image()[source]

(Re)Program the FPGA with the file already on flash

progdev(addr=0)[source]
read(device_name, size, offset=0, use_bulk=True)[source]

Return size_bytes of binary data with carriage-return escape-sequenced. :param device_name: name of memory device from which to read :param size: how many bytes to read :param offset: start at this offset, offset in bytes :param use_bulk: Does nothing. Kept for API compatibility :return: binary data string

read_wishbone(wb_address)[source]

Used to perform low level wishbone read from a Wishbone slave. :param wb_address: address of the wishbone slave to read from :return: Read Data or None

upload_to_ram_and_program(filename, port=None, timeout=None, wait_complete=True)[source]
write_wishbone(wb_address, data)[source]

Used to perform low level wishbone write to a wishbone slave. Gives low level direct access to wishbone bus. :param wb_address: address of the wishbone slave to write to :param data: data to write :return: response object

Forty Gbe Module

casperfpga.fortygbe

alias of casperfpga.fortygbe